dc.contributor.author |
Tiwari, Vivek |
|
dc.contributor.author |
Mourya, Satishkumar (12EE35) |
|
dc.contributor.author |
Chaudhary, Faiyaz (13EE72) |
|
dc.contributor.author |
Khan, Haidar (13EE73) |
|
dc.contributor.author |
Dahatonde, Akshay (12EE11) |
|
dc.date.accessioned |
2016-05-12T09:05:51Z |
|
dc.date.available |
2016-05-12T09:05:51Z |
|
dc.date.issued |
2016-05 |
|
dc.identifier.uri |
http://www.aiktcdspace.org:8080/jspui/handle/123456789/1582 |
|
dc.description |
Submitted in partial fulfillment of requirements for the degree of BACHELOR OF ENGINEERING In ELECTRICAL. |
en_US |
dc.description.abstract |
Multilevel inverters had gain popularity over the years in industrial applications such as
motor drives, static VAR compensators and renewable energy system. Multilevel inverters have
received this attention as it promises less disturbance and possibility to function at lower
switching frequency than traditional two level inverters. Out of many level inverters topologies
proposed, cascaded multilevel inverters features a high modularity degree because each inverter
can be seen as a module with similar circuit topology, control structure and modulation. With
large numbers of advantages CMI has one major limitations of voltage unbalance across the dc
capacitor.
This thesis explores basis structure and operating principles of CMI. Common
modulation techniques are summarized. This thesis also presents the total harmonics distortion
(THD) analysis of seven level CMI with phase shifted (PS) sinusoidal pulse width modulation
(SPWM) and level shifted (LS) SPWM techniques such as phase disposition (PD), phase
opposition disposition (POD), and alternate phase opposition disposition (APOD). The harmonic
spectrum for PS and LS SPWM techniques are compared. Module capacitor voltage balancing
algorithm such as sorting strategy is proposed for CMI. |
en_US |
dc.language.iso |
en_US |
en_US |
dc.publisher |
AIKTC |
en_US |
dc.subject |
Project Report - EE |
en_US |
dc.title |
Analysis of induction motor by using cascaded multilevel inverter |
en_US |
dc.type |
Project Report |
en_US |